/* This file is autogenerated by tracetool, do not edit. */

#ifndef TRACE_HW_XBOX_NV2A_GENERATED_TRACERS_H
#define TRACE_HW_XBOX_NV2A_GENERATED_TRACERS_H

#include "trace/control.h"

extern TraceEvent _TRACE_NV2A_REG_READ_EVENT;
extern TraceEvent _TRACE_NV2A_REG_WRITE_EVENT;
extern TraceEvent _TRACE_NV2A_IRQ_EVENT;
extern TraceEvent _TRACE_NV2A_DMA_MAP_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_METHOD_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_METHOD_ABBREV_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_METHOD_UNHANDLED_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_CPU_READ_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_TARGET_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_SURFACE_UPLOAD_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_FLIP_STALL_EVENT;
extern TraceEvent _TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE_EVENT;
extern uint16_t _TRACE_NV2A_REG_READ_DSTATE;
extern uint16_t _TRACE_NV2A_REG_WRITE_DSTATE;
extern uint16_t _TRACE_NV2A_IRQ_DSTATE;
extern uint16_t _TRACE_NV2A_DMA_MAP_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_METHOD_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_METHOD_ABBREV_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_METHOD_UNHANDLED_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_CPU_READ_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_TARGET_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_SURFACE_UPLOAD_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_FLIP_STALL_DSTATE;
extern uint16_t _TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE_DSTATE;
#define TRACE_NV2A_REG_READ_ENABLED 1
#define TRACE_NV2A_REG_WRITE_ENABLED 1
#define TRACE_NV2A_IRQ_ENABLED 1
#define TRACE_NV2A_DMA_MAP_ENABLED 1
#define TRACE_NV2A_PGRAPH_METHOD_ENABLED 1
#define TRACE_NV2A_PGRAPH_METHOD_ABBREV_ENABLED 1
#define TRACE_NV2A_PGRAPH_METHOD_UNHANDLED_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_CPU_READ_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_TARGET_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED_ENABLED 1
#define TRACE_NV2A_PGRAPH_SURFACE_UPLOAD_ENABLED 1
#define TRACE_NV2A_PGRAPH_FLIP_STALL_ENABLED 1
#define TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE_ENABLED 1
#include "qemu/log-for-trace.h"
#include "qemu/error-report.h"


#define TRACE_NV2A_REG_READ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_REG_READ) || \
    false)

static inline void _nocheck__trace_nv2a_reg_read(const char * block, uint32_t addr, unsigned int size, uint64_t val)
{
    if (trace_event_get_state(TRACE_NV2A_REG_READ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 4 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_reg_read " "%s addr 0x%"PRIx32" size %d val 0x%"PRIx64 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , block, addr, size, val);
#line 109 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 4 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_reg_read " "%s addr 0x%"PRIx32" size %d val 0x%"PRIx64 "\n", block, addr, size, val);
#line 113 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_reg_read(const char * block, uint32_t addr, unsigned int size, uint64_t val)
{
    if (true) {
        _nocheck__trace_nv2a_reg_read(block, addr, size, val);
    }
}

#define TRACE_NV2A_REG_WRITE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_REG_WRITE) || \
    false)

static inline void _nocheck__trace_nv2a_reg_write(const char * block, uint32_t addr, unsigned int size, uint64_t val)
{
    if (trace_event_get_state(TRACE_NV2A_REG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 5 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_reg_write " "%s addr 0x%"PRIx32" size %d val 0x%"PRIx64 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , block, addr, size, val);
#line 140 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 5 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_reg_write " "%s addr 0x%"PRIx32" size %d val 0x%"PRIx64 "\n", block, addr, size, val);
#line 144 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_reg_write(const char * block, uint32_t addr, unsigned int size, uint64_t val)
{
    if (true) {
        _nocheck__trace_nv2a_reg_write(block, addr, size, val);
    }
}

#define TRACE_NV2A_IRQ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_IRQ) || \
    false)

static inline void _nocheck__trace_nv2a_irq(uint32_t pending)
{
    if (trace_event_get_state(TRACE_NV2A_IRQ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 6 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_irq " "%08"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , pending);
#line 171 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 6 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_irq " "%08"PRIx32 "\n", pending);
#line 175 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_irq(uint32_t pending)
{
    if (true) {
        _nocheck__trace_nv2a_irq(pending);
    }
}

#define TRACE_NV2A_DMA_MAP_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_DMA_MAP) || \
    false)

static inline void _nocheck__trace_nv2a_dma_map(uint32_t obj_address, uint32_t dma_class, uint32_t dma_target, uint32_t dma_addr, uint32_t dma_limit)
{
    if (trace_event_get_state(TRACE_NV2A_DMA_MAP) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 7 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_dma_map " "obj 0x%08"PRIx32" class 0x%08"PRIx32" target 0x%08"PRIx32" addr 0x%08"PRIx32" limit 0x%08"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , obj_address, dma_class, dma_target, dma_addr, dma_limit);
#line 202 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 7 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_dma_map " "obj 0x%08"PRIx32" class 0x%08"PRIx32" target 0x%08"PRIx32" addr 0x%08"PRIx32" limit 0x%08"PRIx32 "\n", obj_address, dma_class, dma_target, dma_addr, dma_limit);
#line 206 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_dma_map(uint32_t obj_address, uint32_t dma_class, uint32_t dma_target, uint32_t dma_addr, uint32_t dma_limit)
{
    if (true) {
        _nocheck__trace_nv2a_dma_map(obj_address, dma_class, dma_target, dma_addr, dma_limit);
    }
}

#define TRACE_NV2A_PGRAPH_METHOD_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_METHOD) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_method(uint32_t subchannel, uint32_t graphics_class, uint32_t method, const char * name, uint32_t offset, uint32_t parameter)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_METHOD) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 10 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_method " "%d: 0x%"PRIx32" -> 0x%04"PRIx32" %s[%"PRId32"] 0x%"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , subchannel, graphics_class, method, name, offset, parameter);
#line 233 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 10 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_method " "%d: 0x%"PRIx32" -> 0x%04"PRIx32" %s[%"PRId32"] 0x%"PRIx32 "\n", subchannel, graphics_class, method, name, offset, parameter);
#line 237 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_method(uint32_t subchannel, uint32_t graphics_class, uint32_t method, const char * name, uint32_t offset, uint32_t parameter)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_method(subchannel, graphics_class, method, name, offset, parameter);
    }
}

#define TRACE_NV2A_PGRAPH_METHOD_ABBREV_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_METHOD_ABBREV) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_method_abbrev(uint32_t subchannel, uint32_t graphics_class, uint32_t method, const char * name, unsigned int count)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_METHOD_ABBREV) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 11 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_method_abbrev " "%d: 0x%"PRIx32" -> 0x%04"PRIx32" %s * %d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , subchannel, graphics_class, method, name, count);
#line 264 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 11 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_method_abbrev " "%d: 0x%"PRIx32" -> 0x%04"PRIx32" %s * %d" "\n", subchannel, graphics_class, method, name, count);
#line 268 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_method_abbrev(uint32_t subchannel, uint32_t graphics_class, uint32_t method, const char * name, unsigned int count)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_method_abbrev(subchannel, graphics_class, method, name, count);
    }
}

#define TRACE_NV2A_PGRAPH_METHOD_UNHANDLED_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_METHOD_UNHANDLED) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_method_unhandled(uint32_t subchannel, uint32_t graphics_class, uint32_t method, uint32_t parameter)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_METHOD_UNHANDLED) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 12 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_method_unhandled " "%d: 0x%"PRIx32" -> 0x%04"PRIx32" 0x%"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , subchannel, graphics_class, method, parameter);
#line 295 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 12 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_method_unhandled " "%d: 0x%"PRIx32" -> 0x%04"PRIx32" 0x%"PRIx32 "\n", subchannel, graphics_class, method, parameter);
#line 299 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_method_unhandled(uint32_t subchannel, uint32_t graphics_class, uint32_t method, uint32_t parameter)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_method_unhandled(subchannel, graphics_class, method, parameter);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_compare_mismatch(const char * field, long int a, long int b)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_COMPARE_MISMATCH) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 13 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_compare_mismatch " "%20s -- %8ld vs %8ld" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , field, a, b);
#line 326 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 13 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_compare_mismatch " "%20s -- %8ld vs %8ld" "\n", field, a, b);
#line 330 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_compare_mismatch(const char * field, long int a, long int b)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_compare_mismatch(field, a, b);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_CPU_READ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_CPU_READ) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_cpu_read(uint32_t addr, uint32_t offset)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_CPU_READ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 14 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_cpu_read " "0x%08"PRIx32"+0x%"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, offset);
#line 357 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 14 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_cpu_read " "0x%08"PRIx32"+0x%"PRIx32 "\n", addr, offset);
#line 361 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_cpu_read(uint32_t addr, uint32_t offset)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_cpu_read(addr, offset);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_cpu_write(uint32_t addr, uint32_t offset)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_CPU_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 15 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_cpu_write " "0x%08"PRIx32"+0x%"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, offset);
#line 388 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 15 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_cpu_write " "0x%08"PRIx32"+0x%"PRIx32 "\n", addr, offset);
#line 392 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_cpu_write(uint32_t addr, uint32_t offset)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_cpu_write(addr, offset);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_create_color(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_CREATE_COLOR) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 16 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_create_color " "Create: [COLOR @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d, clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 419 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 16 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_create_color " "Create: [COLOR @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d, clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n", addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 423 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_create_color(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_create_color(addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_create_zeta(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_CREATE_ZETA) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 17 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_create_zeta " " Create: [ZETA  @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d, clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 450 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 17 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_create_zeta " " Create: [ZETA  @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d, clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n", addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 454 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_create_zeta(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_create_zeta(addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_download(const char * binding, const char * layout, uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch, uint32_t bytes_per_pixel)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_DOWNLOAD) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 18 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_download " "[GPU->RAM] %s (%s) surface @ 0x%08" PRIx32 " (w=%d,h=%d,p=%d,bpp=%d)" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , binding, layout, addr, width, height, pitch, bytes_per_pixel);
#line 481 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 18 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_download " "[GPU->RAM] %s (%s) surface @ 0x%08" PRIx32 " (w=%d,h=%d,p=%d,bpp=%d)" "\n", binding, layout, addr, width, height, pitch, bytes_per_pixel);
#line 485 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_download(const char * binding, const char * layout, uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch, uint32_t bytes_per_pixel)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_download(binding, layout, addr, width, height, pitch, bytes_per_pixel);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_evict_overlapping(uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_EVICT_OVERLAPPING) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 19 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_evict_overlapping " "Evicting overlapping surface @ 0x%08" PRIx32 " (%dx%d,p=%d)" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, width, height, pitch);
#line 512 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 19 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_evict_overlapping " "Evicting overlapping surface @ 0x%08" PRIx32 " (%dx%d,p=%d)" "\n", addr, width, height, pitch);
#line 516 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_evict_overlapping(uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_evict_overlapping(addr, width, height, pitch);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_evict_reason(const char * reason, uint32_t addr)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_EVICT_REASON) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 20 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_evict_reason " "Evicting %s surface @ 0x%08" PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , reason, addr);
#line 543 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 20 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_evict_reason " "Evicting %s surface @ 0x%08" PRIx32 "\n", reason, addr);
#line 547 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_evict_reason(const char * reason, uint32_t addr)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_evict_reason(reason, addr);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_hit_color(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_HIT_COLOR) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 21 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_hit_color " "   Hit: [COLOR @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d, clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 574 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 21 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_hit_color " "   Hit: [COLOR @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d, clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n", addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 578 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_hit_color(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_hit_color(addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_hit_zeta(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_HIT_ZETA) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 22 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_hit_zeta " "    Hit: [ZETA  @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d, clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 605 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 22 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_hit_zeta " "    Hit: [ZETA  @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d, clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n", addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 609 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_hit_zeta(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_hit_zeta(addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_invalidated(uint32_t addr)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_INVALIDATED) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 23 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_invalidated " "0x%08"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr);
#line 636 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 23 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_invalidated " "0x%08"PRIx32 "\n", addr);
#line 640 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_invalidated(uint32_t addr)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_invalidated(addr);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_match_color(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_MATCH_COLOR) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 24 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_match_color " " Match: [COLOR @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 667 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 24 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_match_color " " Match: [COLOR @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n", addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 671 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_match_color(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_match_color(addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_match_zeta(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_MATCH_ZETA) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 25 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_match_zeta " "  Match: [ZETA  @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 698 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 25 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_match_zeta " "  Match: [ZETA  @ 0x%08" PRIx32 " (%dx%d)] (%s) aa:%d clip:x=%d,w=%d,y=%d,h=%d,p=%d" "\n", addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
#line 702 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_match_zeta(uint32_t addr, uint32_t width, uint32_t height, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height, uint32_t pitch)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_match_zeta(addr, width, height, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height, pitch);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_migrate_type(const char * new_type)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_MIGRATE_TYPE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 26 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_migrate_type " "Migrating surface type to %s" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , new_type);
#line 729 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 26 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_migrate_type " "Migrating surface type to %s" "\n", new_type);
#line 733 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_migrate_type(const char * new_type)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_migrate_type(new_type);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_render_to_texture(uint32_t addr, uint32_t width, uint32_t height)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_RENDER_TO_TEXTURE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 27 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_render_to_texture " "Rendering surface 0x%08" PRIx32 " to texture (%dx%d)" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, width, height);
#line 760 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 27 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_render_to_texture " "Rendering surface 0x%08" PRIx32 " to texture (%dx%d)" "\n", addr, width, height);
#line 764 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_render_to_texture(uint32_t addr, uint32_t width, uint32_t height)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_render_to_texture(addr, width, height);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_TARGET_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_TARGET) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_target(const char * binding, uint32_t addr, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_TARGET) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 28 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_target " "      Target: [%-5s @ 0x%08" PRIx32 "] (%s) aa:%d clip:x=%d,w=%d,y=%d,h=%d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , binding, addr, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height);
#line 791 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 28 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_target " "      Target: [%-5s @ 0x%08" PRIx32 "] (%s) aa:%d clip:x=%d,w=%d,y=%d,h=%d" "\n", binding, addr, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height);
#line 795 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_target(const char * binding, uint32_t addr, const char * layout, uint32_t anti_aliasing, uint32_t clip_x, uint32_t clip_width, uint32_t clip_y, uint32_t clip_height)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_target(binding, addr, layout, anti_aliasing, clip_x, clip_width, clip_y, clip_height);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_texture_compat_failed(int32_t surface_fmt, int32_t texture_fmt)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_TEXTURE_COMPAT_FAILED) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 29 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_texture_compat_failed " "Surface->Texture compat failed: %x to %x" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , surface_fmt, texture_fmt);
#line 822 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 29 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_texture_compat_failed " "Surface->Texture compat failed: %x to %x" "\n", surface_fmt, texture_fmt);
#line 826 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_texture_compat_failed(int32_t surface_fmt, int32_t texture_fmt)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_texture_compat_failed(surface_fmt, texture_fmt);
    }
}

#define TRACE_NV2A_PGRAPH_SURFACE_UPLOAD_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_SURFACE_UPLOAD) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_surface_upload(const char * binding, const char * layout, uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch, uint32_t bytes_per_pixel)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_SURFACE_UPLOAD) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 30 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_surface_upload " "[RAM->GPU] %s (%s) surface @ 0x%08" PRIx32 " (w=%d,h=%d,p=%d,bpp=%d)" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , binding, layout, addr, width, height, pitch, bytes_per_pixel);
#line 853 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 30 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_surface_upload " "[RAM->GPU] %s (%s) surface @ 0x%08" PRIx32 " (w=%d,h=%d,p=%d,bpp=%d)" "\n", binding, layout, addr, width, height, pitch, bytes_per_pixel);
#line 857 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_surface_upload(const char * binding, const char * layout, uint32_t addr, uint32_t width, uint32_t height, uint32_t pitch, uint32_t bytes_per_pixel)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_surface_upload(binding, layout, addr, width, height, pitch, bytes_per_pixel);
    }
}

#define TRACE_NV2A_PGRAPH_FLIP_STALL_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_FLIP_STALL) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_flip_stall(void)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_FLIP_STALL) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 31 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_flip_stall " "" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 884 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 31 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_flip_stall " "" "\n");
#line 888 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_flip_stall(void)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_flip_stall();
    }
}

#define TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE) || \
    false)

static inline void _nocheck__trace_nv2a_pgraph_flip_increment_write(uint32_t write3d_old, uint32_t write3d_new)
{
    if (trace_event_get_state(TRACE_NV2A_PGRAPH_FLIP_INCREMENT_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 32 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("%d@%zu.%06zu:nv2a_pgraph_flip_increment_write " "0x%"PRIx32" -> 0x%"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , write3d_old, write3d_new);
#line 915 "trace/trace-hw_xbox_nv2a.h"
        } else {
#line 32 "../xemu/hw/xbox/nv2a/trace-events"
            qemu_log("nv2a_pgraph_flip_increment_write " "0x%"PRIx32" -> 0x%"PRIx32 "\n", write3d_old, write3d_new);
#line 919 "trace/trace-hw_xbox_nv2a.h"
        }
    }
}

static inline void trace_nv2a_pgraph_flip_increment_write(uint32_t write3d_old, uint32_t write3d_new)
{
    if (true) {
        _nocheck__trace_nv2a_pgraph_flip_increment_write(write3d_old, write3d_new);
    }
}
#endif /* TRACE_HW_XBOX_NV2A_GENERATED_TRACERS_H */
