/* This file is autogenerated by tracetool, do not edit. */

#ifndef TRACE_HW_DMA_GENERATED_TRACERS_H
#define TRACE_HW_DMA_GENERATED_TRACERS_H

#include "trace/control.h"

extern TraceEvent _TRACE_JAZZIO_READ_EVENT;
extern TraceEvent _TRACE_JAZZIO_WRITE_EVENT;
extern TraceEvent _TRACE_RC4030_READ_EVENT;
extern TraceEvent _TRACE_RC4030_WRITE_EVENT;
extern TraceEvent _TRACE_LEDMA_MEMORY_READ_EVENT;
extern TraceEvent _TRACE_LEDMA_MEMORY_WRITE_EVENT;
extern TraceEvent _TRACE_SPARC32_DMA_SET_IRQ_RAISE_EVENT;
extern TraceEvent _TRACE_SPARC32_DMA_SET_IRQ_LOWER_EVENT;
extern TraceEvent _TRACE_ESPDMA_MEMORY_READ_EVENT;
extern TraceEvent _TRACE_ESPDMA_MEMORY_WRITE_EVENT;
extern TraceEvent _TRACE_SPARC32_DMA_MEM_READL_EVENT;
extern TraceEvent _TRACE_SPARC32_DMA_MEM_WRITEL_EVENT;
extern TraceEvent _TRACE_SPARC32_DMA_ENABLE_RAISE_EVENT;
extern TraceEvent _TRACE_SPARC32_DMA_ENABLE_LOWER_EVENT;
extern TraceEvent _TRACE_I8257_UNREGISTERED_DMA_EVENT;
extern TraceEvent _TRACE_PL330_FAULT_EVENT;
extern TraceEvent _TRACE_PL330_FAULT_ABORT_EVENT;
extern TraceEvent _TRACE_PL330_DMAEND_EVENT;
extern TraceEvent _TRACE_PL330_DMAGO_EVENT;
extern TraceEvent _TRACE_PL330_DMALD_EVENT;
extern TraceEvent _TRACE_PL330_DMAKILL_EVENT;
extern TraceEvent _TRACE_PL330_DMALPEND_EVENT;
extern TraceEvent _TRACE_PL330_DMALPITER_EVENT;
extern TraceEvent _TRACE_PL330_DMALPFALLTHROUGH_EVENT;
extern TraceEvent _TRACE_PL330_DMASEV_EVIRQ_EVENT;
extern TraceEvent _TRACE_PL330_DMASEV_EVENT_EVENT;
extern TraceEvent _TRACE_PL330_DMAST_EVENT;
extern TraceEvent _TRACE_PL330_DMAWFE_EVENT;
extern TraceEvent _TRACE_PL330_CHAN_EXEC_UNDEF_EVENT;
extern TraceEvent _TRACE_PL330_EXEC_CYCLE_EVENT;
extern TraceEvent _TRACE_PL330_HEXDUMP_EVENT;
extern TraceEvent _TRACE_PL330_EXEC_EVENT;
extern TraceEvent _TRACE_PL330_DEBUG_EXEC_EVENT;
extern TraceEvent _TRACE_PL330_DEBUG_EXEC_STALL_EVENT;
extern TraceEvent _TRACE_PL330_IOMEM_WRITE_EVENT;
extern TraceEvent _TRACE_PL330_IOMEM_WRITE_CLR_EVENT;
extern TraceEvent _TRACE_PL330_IOMEM_READ_EVENT;
extern TraceEvent _TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL_EVENT;
extern uint16_t _TRACE_JAZZIO_READ_DSTATE;
extern uint16_t _TRACE_JAZZIO_WRITE_DSTATE;
extern uint16_t _TRACE_RC4030_READ_DSTATE;
extern uint16_t _TRACE_RC4030_WRITE_DSTATE;
extern uint16_t _TRACE_LEDMA_MEMORY_READ_DSTATE;
extern uint16_t _TRACE_LEDMA_MEMORY_WRITE_DSTATE;
extern uint16_t _TRACE_SPARC32_DMA_SET_IRQ_RAISE_DSTATE;
extern uint16_t _TRACE_SPARC32_DMA_SET_IRQ_LOWER_DSTATE;
extern uint16_t _TRACE_ESPDMA_MEMORY_READ_DSTATE;
extern uint16_t _TRACE_ESPDMA_MEMORY_WRITE_DSTATE;
extern uint16_t _TRACE_SPARC32_DMA_MEM_READL_DSTATE;
extern uint16_t _TRACE_SPARC32_DMA_MEM_WRITEL_DSTATE;
extern uint16_t _TRACE_SPARC32_DMA_ENABLE_RAISE_DSTATE;
extern uint16_t _TRACE_SPARC32_DMA_ENABLE_LOWER_DSTATE;
extern uint16_t _TRACE_I8257_UNREGISTERED_DMA_DSTATE;
extern uint16_t _TRACE_PL330_FAULT_DSTATE;
extern uint16_t _TRACE_PL330_FAULT_ABORT_DSTATE;
extern uint16_t _TRACE_PL330_DMAEND_DSTATE;
extern uint16_t _TRACE_PL330_DMAGO_DSTATE;
extern uint16_t _TRACE_PL330_DMALD_DSTATE;
extern uint16_t _TRACE_PL330_DMAKILL_DSTATE;
extern uint16_t _TRACE_PL330_DMALPEND_DSTATE;
extern uint16_t _TRACE_PL330_DMALPITER_DSTATE;
extern uint16_t _TRACE_PL330_DMALPFALLTHROUGH_DSTATE;
extern uint16_t _TRACE_PL330_DMASEV_EVIRQ_DSTATE;
extern uint16_t _TRACE_PL330_DMASEV_EVENT_DSTATE;
extern uint16_t _TRACE_PL330_DMAST_DSTATE;
extern uint16_t _TRACE_PL330_DMAWFE_DSTATE;
extern uint16_t _TRACE_PL330_CHAN_EXEC_UNDEF_DSTATE;
extern uint16_t _TRACE_PL330_EXEC_CYCLE_DSTATE;
extern uint16_t _TRACE_PL330_HEXDUMP_DSTATE;
extern uint16_t _TRACE_PL330_EXEC_DSTATE;
extern uint16_t _TRACE_PL330_DEBUG_EXEC_DSTATE;
extern uint16_t _TRACE_PL330_DEBUG_EXEC_STALL_DSTATE;
extern uint16_t _TRACE_PL330_IOMEM_WRITE_DSTATE;
extern uint16_t _TRACE_PL330_IOMEM_WRITE_CLR_DSTATE;
extern uint16_t _TRACE_PL330_IOMEM_READ_DSTATE;
extern uint16_t _TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL_DSTATE;
#define TRACE_JAZZIO_READ_ENABLED 1
#define TRACE_JAZZIO_WRITE_ENABLED 1
#define TRACE_RC4030_READ_ENABLED 1
#define TRACE_RC4030_WRITE_ENABLED 1
#define TRACE_LEDMA_MEMORY_READ_ENABLED 1
#define TRACE_LEDMA_MEMORY_WRITE_ENABLED 1
#define TRACE_SPARC32_DMA_SET_IRQ_RAISE_ENABLED 1
#define TRACE_SPARC32_DMA_SET_IRQ_LOWER_ENABLED 1
#define TRACE_ESPDMA_MEMORY_READ_ENABLED 1
#define TRACE_ESPDMA_MEMORY_WRITE_ENABLED 1
#define TRACE_SPARC32_DMA_MEM_READL_ENABLED 1
#define TRACE_SPARC32_DMA_MEM_WRITEL_ENABLED 1
#define TRACE_SPARC32_DMA_ENABLE_RAISE_ENABLED 1
#define TRACE_SPARC32_DMA_ENABLE_LOWER_ENABLED 1
#define TRACE_I8257_UNREGISTERED_DMA_ENABLED 1
#define TRACE_PL330_FAULT_ENABLED 1
#define TRACE_PL330_FAULT_ABORT_ENABLED 1
#define TRACE_PL330_DMAEND_ENABLED 1
#define TRACE_PL330_DMAGO_ENABLED 1
#define TRACE_PL330_DMALD_ENABLED 1
#define TRACE_PL330_DMAKILL_ENABLED 1
#define TRACE_PL330_DMALPEND_ENABLED 1
#define TRACE_PL330_DMALPITER_ENABLED 1
#define TRACE_PL330_DMALPFALLTHROUGH_ENABLED 1
#define TRACE_PL330_DMASEV_EVIRQ_ENABLED 1
#define TRACE_PL330_DMASEV_EVENT_ENABLED 1
#define TRACE_PL330_DMAST_ENABLED 1
#define TRACE_PL330_DMAWFE_ENABLED 1
#define TRACE_PL330_CHAN_EXEC_UNDEF_ENABLED 1
#define TRACE_PL330_EXEC_CYCLE_ENABLED 1
#define TRACE_PL330_HEXDUMP_ENABLED 1
#define TRACE_PL330_EXEC_ENABLED 1
#define TRACE_PL330_DEBUG_EXEC_ENABLED 1
#define TRACE_PL330_DEBUG_EXEC_STALL_ENABLED 1
#define TRACE_PL330_IOMEM_WRITE_ENABLED 1
#define TRACE_PL330_IOMEM_WRITE_CLR_ENABLED 1
#define TRACE_PL330_IOMEM_READ_ENABLED 1
#define TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL_ENABLED 1
#include "qemu/log-for-trace.h"
#include "qemu/error-report.h"


#define TRACE_JAZZIO_READ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_JAZZIO_READ) || \
    false)

static inline void _nocheck__trace_jazzio_read(uint64_t addr, uint32_t ret)
{
    if (trace_event_get_state(TRACE_JAZZIO_READ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 4 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:jazzio_read " "read reg[0x%"PRIx64"] = 0x%x" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, ret);
#line 142 "trace/trace-hw_dma.h"
        } else {
#line 4 "../xemu/hw/dma/trace-events"
            qemu_log("jazzio_read " "read reg[0x%"PRIx64"] = 0x%x" "\n", addr, ret);
#line 146 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_jazzio_read(uint64_t addr, uint32_t ret)
{
    if (true) {
        _nocheck__trace_jazzio_read(addr, ret);
    }
}

#define TRACE_JAZZIO_WRITE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_JAZZIO_WRITE) || \
    false)

static inline void _nocheck__trace_jazzio_write(uint64_t addr, uint32_t val)
{
    if (trace_event_get_state(TRACE_JAZZIO_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 5 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:jazzio_write " "write reg[0x%"PRIx64"] = 0x%x" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, val);
#line 173 "trace/trace-hw_dma.h"
        } else {
#line 5 "../xemu/hw/dma/trace-events"
            qemu_log("jazzio_write " "write reg[0x%"PRIx64"] = 0x%x" "\n", addr, val);
#line 177 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_jazzio_write(uint64_t addr, uint32_t val)
{
    if (true) {
        _nocheck__trace_jazzio_write(addr, val);
    }
}

#define TRACE_RC4030_READ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_RC4030_READ) || \
    false)

static inline void _nocheck__trace_rc4030_read(uint64_t addr, uint32_t ret)
{
    if (trace_event_get_state(TRACE_RC4030_READ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 6 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:rc4030_read " "read reg[0x%"PRIx64"] = 0x%x" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, ret);
#line 204 "trace/trace-hw_dma.h"
        } else {
#line 6 "../xemu/hw/dma/trace-events"
            qemu_log("rc4030_read " "read reg[0x%"PRIx64"] = 0x%x" "\n", addr, ret);
#line 208 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_rc4030_read(uint64_t addr, uint32_t ret)
{
    if (true) {
        _nocheck__trace_rc4030_read(addr, ret);
    }
}

#define TRACE_RC4030_WRITE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_RC4030_WRITE) || \
    false)

static inline void _nocheck__trace_rc4030_write(uint64_t addr, uint32_t val)
{
    if (trace_event_get_state(TRACE_RC4030_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 7 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:rc4030_write " "write reg[0x%"PRIx64"] = 0x%x" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, val);
#line 235 "trace/trace-hw_dma.h"
        } else {
#line 7 "../xemu/hw/dma/trace-events"
            qemu_log("rc4030_write " "write reg[0x%"PRIx64"] = 0x%x" "\n", addr, val);
#line 239 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_rc4030_write(uint64_t addr, uint32_t val)
{
    if (true) {
        _nocheck__trace_rc4030_write(addr, val);
    }
}

#define TRACE_LEDMA_MEMORY_READ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_LEDMA_MEMORY_READ) || \
    false)

static inline void _nocheck__trace_ledma_memory_read(uint64_t addr, int len)
{
    if (trace_event_get_state(TRACE_LEDMA_MEMORY_READ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 10 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:ledma_memory_read " "DMA read addr 0x%"PRIx64 " len %d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, len);
#line 266 "trace/trace-hw_dma.h"
        } else {
#line 10 "../xemu/hw/dma/trace-events"
            qemu_log("ledma_memory_read " "DMA read addr 0x%"PRIx64 " len %d" "\n", addr, len);
#line 270 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_ledma_memory_read(uint64_t addr, int len)
{
    if (true) {
        _nocheck__trace_ledma_memory_read(addr, len);
    }
}

#define TRACE_LEDMA_MEMORY_WRITE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_LEDMA_MEMORY_WRITE) || \
    false)

static inline void _nocheck__trace_ledma_memory_write(uint64_t addr, int len)
{
    if (trace_event_get_state(TRACE_LEDMA_MEMORY_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 11 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:ledma_memory_write " "DMA write addr 0x%"PRIx64 " len %d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, len);
#line 297 "trace/trace-hw_dma.h"
        } else {
#line 11 "../xemu/hw/dma/trace-events"
            qemu_log("ledma_memory_write " "DMA write addr 0x%"PRIx64 " len %d" "\n", addr, len);
#line 301 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_ledma_memory_write(uint64_t addr, int len)
{
    if (true) {
        _nocheck__trace_ledma_memory_write(addr, len);
    }
}

#define TRACE_SPARC32_DMA_SET_IRQ_RAISE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_SPARC32_DMA_SET_IRQ_RAISE) || \
    false)

static inline void _nocheck__trace_sparc32_dma_set_irq_raise(void)
{
    if (trace_event_get_state(TRACE_SPARC32_DMA_SET_IRQ_RAISE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 12 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:sparc32_dma_set_irq_raise " "Raise IRQ" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 328 "trace/trace-hw_dma.h"
        } else {
#line 12 "../xemu/hw/dma/trace-events"
            qemu_log("sparc32_dma_set_irq_raise " "Raise IRQ" "\n");
#line 332 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_sparc32_dma_set_irq_raise(void)
{
    if (true) {
        _nocheck__trace_sparc32_dma_set_irq_raise();
    }
}

#define TRACE_SPARC32_DMA_SET_IRQ_LOWER_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_SPARC32_DMA_SET_IRQ_LOWER) || \
    false)

static inline void _nocheck__trace_sparc32_dma_set_irq_lower(void)
{
    if (trace_event_get_state(TRACE_SPARC32_DMA_SET_IRQ_LOWER) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 13 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:sparc32_dma_set_irq_lower " "Lower IRQ" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 359 "trace/trace-hw_dma.h"
        } else {
#line 13 "../xemu/hw/dma/trace-events"
            qemu_log("sparc32_dma_set_irq_lower " "Lower IRQ" "\n");
#line 363 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_sparc32_dma_set_irq_lower(void)
{
    if (true) {
        _nocheck__trace_sparc32_dma_set_irq_lower();
    }
}

#define TRACE_ESPDMA_MEMORY_READ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_ESPDMA_MEMORY_READ) || \
    false)

static inline void _nocheck__trace_espdma_memory_read(uint32_t addr, int len)
{
    if (trace_event_get_state(TRACE_ESPDMA_MEMORY_READ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 14 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:espdma_memory_read " "DMA read addr 0x%08x len %d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, len);
#line 390 "trace/trace-hw_dma.h"
        } else {
#line 14 "../xemu/hw/dma/trace-events"
            qemu_log("espdma_memory_read " "DMA read addr 0x%08x len %d" "\n", addr, len);
#line 394 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_espdma_memory_read(uint32_t addr, int len)
{
    if (true) {
        _nocheck__trace_espdma_memory_read(addr, len);
    }
}

#define TRACE_ESPDMA_MEMORY_WRITE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_ESPDMA_MEMORY_WRITE) || \
    false)

static inline void _nocheck__trace_espdma_memory_write(uint32_t addr, int len)
{
    if (trace_event_get_state(TRACE_ESPDMA_MEMORY_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 15 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:espdma_memory_write " "DMA write addr 0x%08x len %d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, len);
#line 421 "trace/trace-hw_dma.h"
        } else {
#line 15 "../xemu/hw/dma/trace-events"
            qemu_log("espdma_memory_write " "DMA write addr 0x%08x len %d" "\n", addr, len);
#line 425 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_espdma_memory_write(uint32_t addr, int len)
{
    if (true) {
        _nocheck__trace_espdma_memory_write(addr, len);
    }
}

#define TRACE_SPARC32_DMA_MEM_READL_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_SPARC32_DMA_MEM_READL) || \
    false)

static inline void _nocheck__trace_sparc32_dma_mem_readl(uint64_t addr, uint32_t ret)
{
    if (trace_event_get_state(TRACE_SPARC32_DMA_MEM_READL) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 16 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:sparc32_dma_mem_readl " "read dmareg 0x%"PRIx64": 0x%08x" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, ret);
#line 452 "trace/trace-hw_dma.h"
        } else {
#line 16 "../xemu/hw/dma/trace-events"
            qemu_log("sparc32_dma_mem_readl " "read dmareg 0x%"PRIx64": 0x%08x" "\n", addr, ret);
#line 456 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_sparc32_dma_mem_readl(uint64_t addr, uint32_t ret)
{
    if (true) {
        _nocheck__trace_sparc32_dma_mem_readl(addr, ret);
    }
}

#define TRACE_SPARC32_DMA_MEM_WRITEL_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_SPARC32_DMA_MEM_WRITEL) || \
    false)

static inline void _nocheck__trace_sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val)
{
    if (trace_event_get_state(TRACE_SPARC32_DMA_MEM_WRITEL) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 17 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:sparc32_dma_mem_writel " "write dmareg 0x%"PRIx64": 0x%08x -> 0x%08x" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, old, val);
#line 483 "trace/trace-hw_dma.h"
        } else {
#line 17 "../xemu/hw/dma/trace-events"
            qemu_log("sparc32_dma_mem_writel " "write dmareg 0x%"PRIx64": 0x%08x -> 0x%08x" "\n", addr, old, val);
#line 487 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val)
{
    if (true) {
        _nocheck__trace_sparc32_dma_mem_writel(addr, old, val);
    }
}

#define TRACE_SPARC32_DMA_ENABLE_RAISE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_SPARC32_DMA_ENABLE_RAISE) || \
    false)

static inline void _nocheck__trace_sparc32_dma_enable_raise(void)
{
    if (trace_event_get_state(TRACE_SPARC32_DMA_ENABLE_RAISE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 18 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:sparc32_dma_enable_raise " "Raise DMA enable" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 514 "trace/trace-hw_dma.h"
        } else {
#line 18 "../xemu/hw/dma/trace-events"
            qemu_log("sparc32_dma_enable_raise " "Raise DMA enable" "\n");
#line 518 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_sparc32_dma_enable_raise(void)
{
    if (true) {
        _nocheck__trace_sparc32_dma_enable_raise();
    }
}

#define TRACE_SPARC32_DMA_ENABLE_LOWER_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_SPARC32_DMA_ENABLE_LOWER) || \
    false)

static inline void _nocheck__trace_sparc32_dma_enable_lower(void)
{
    if (trace_event_get_state(TRACE_SPARC32_DMA_ENABLE_LOWER) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 19 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:sparc32_dma_enable_lower " "Lower DMA enable" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 545 "trace/trace-hw_dma.h"
        } else {
#line 19 "../xemu/hw/dma/trace-events"
            qemu_log("sparc32_dma_enable_lower " "Lower DMA enable" "\n");
#line 549 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_sparc32_dma_enable_lower(void)
{
    if (true) {
        _nocheck__trace_sparc32_dma_enable_lower();
    }
}

#define TRACE_I8257_UNREGISTERED_DMA_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_I8257_UNREGISTERED_DMA) || \
    false)

static inline void _nocheck__trace_i8257_unregistered_dma(int nchan, int dma_pos, int dma_len)
{
    if (trace_event_get_state(TRACE_I8257_UNREGISTERED_DMA) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 22 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:i8257_unregistered_dma " "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , nchan, dma_pos, dma_len);
#line 576 "trace/trace-hw_dma.h"
        } else {
#line 22 "../xemu/hw/dma/trace-events"
            qemu_log("i8257_unregistered_dma " "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" "\n", nchan, dma_pos, dma_len);
#line 580 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_i8257_unregistered_dma(int nchan, int dma_pos, int dma_len)
{
    if (true) {
        _nocheck__trace_i8257_unregistered_dma(nchan, dma_pos, dma_len);
    }
}

#define TRACE_PL330_FAULT_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_FAULT) || \
    false)

static inline void _nocheck__trace_pl330_fault(void * ptr, uint32_t flags)
{
    if (trace_event_get_state(TRACE_PL330_FAULT) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 25 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_fault " "ch: %p, flags: 0x%"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , ptr, flags);
#line 607 "trace/trace-hw_dma.h"
        } else {
#line 25 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_fault " "ch: %p, flags: 0x%"PRIx32 "\n", ptr, flags);
#line 611 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_fault(void * ptr, uint32_t flags)
{
    if (true) {
        _nocheck__trace_pl330_fault(ptr, flags);
    }
}

#define TRACE_PL330_FAULT_ABORT_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_FAULT_ABORT) || \
    false)

static inline void _nocheck__trace_pl330_fault_abort(void)
{
    if (trace_event_get_state(TRACE_PL330_FAULT_ABORT) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 26 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_fault_abort " "abort interrupt raised" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 638 "trace/trace-hw_dma.h"
        } else {
#line 26 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_fault_abort " "abort interrupt raised" "\n");
#line 642 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_fault_abort(void)
{
    if (true) {
        _nocheck__trace_pl330_fault_abort();
    }
}

#define TRACE_PL330_DMAEND_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMAEND) || \
    false)

static inline void _nocheck__trace_pl330_dmaend(void)
{
    if (trace_event_get_state(TRACE_PL330_DMAEND) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 27 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmaend " "DMA ending" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 669 "trace/trace-hw_dma.h"
        } else {
#line 27 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmaend " "DMA ending" "\n");
#line 673 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmaend(void)
{
    if (true) {
        _nocheck__trace_pl330_dmaend();
    }
}

#define TRACE_PL330_DMAGO_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMAGO) || \
    false)

static inline void _nocheck__trace_pl330_dmago(void)
{
    if (trace_event_get_state(TRACE_PL330_DMAGO) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 28 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmago " "DMA run" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 700 "trace/trace-hw_dma.h"
        } else {
#line 28 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmago " "DMA run" "\n");
#line 704 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmago(void)
{
    if (true) {
        _nocheck__trace_pl330_dmago();
    }
}

#define TRACE_PL330_DMALD_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMALD) || \
    false)

static inline void _nocheck__trace_pl330_dmald(uint8_t chan, uint32_t addr, uint32_t size, uint32_t num, char ch)
{
    if (trace_event_get_state(TRACE_PL330_DMALD) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 29 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmald " "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PRId32"%c" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , chan, addr, size, num, ch);
#line 731 "trace/trace-hw_dma.h"
        } else {
#line 29 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmald " "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PRId32"%c" "\n", chan, addr, size, num, ch);
#line 735 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmald(uint8_t chan, uint32_t addr, uint32_t size, uint32_t num, char ch)
{
    if (true) {
        _nocheck__trace_pl330_dmald(chan, addr, size, num, ch);
    }
}

#define TRACE_PL330_DMAKILL_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMAKILL) || \
    false)

static inline void _nocheck__trace_pl330_dmakill(void)
{
    if (trace_event_get_state(TRACE_PL330_DMAKILL) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 30 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmakill " "abort interrupt lowered" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 762 "trace/trace-hw_dma.h"
        } else {
#line 30 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmakill " "abort interrupt lowered" "\n");
#line 766 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmakill(void)
{
    if (true) {
        _nocheck__trace_pl330_dmakill();
    }
}

#define TRACE_PL330_DMALPEND_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMALPEND) || \
    false)

static inline void _nocheck__trace_pl330_dmalpend(uint8_t nf, uint8_t bs, uint8_t lc, uint8_t ch, uint8_t flag)
{
    if (trace_event_get_state(TRACE_PL330_DMALPEND) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 31 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmalpend " "nf=0x%02x bs=0x%02x lc=0x%02x ch=0x%02x flag=0x%02x" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , nf, bs, lc, ch, flag);
#line 793 "trace/trace-hw_dma.h"
        } else {
#line 31 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmalpend " "nf=0x%02x bs=0x%02x lc=0x%02x ch=0x%02x flag=0x%02x" "\n", nf, bs, lc, ch, flag);
#line 797 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmalpend(uint8_t nf, uint8_t bs, uint8_t lc, uint8_t ch, uint8_t flag)
{
    if (true) {
        _nocheck__trace_pl330_dmalpend(nf, bs, lc, ch, flag);
    }
}

#define TRACE_PL330_DMALPITER_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMALPITER) || \
    false)

static inline void _nocheck__trace_pl330_dmalpiter(void)
{
    if (trace_event_get_state(TRACE_PL330_DMALPITER) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 32 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmalpiter " "loop reiteration" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 824 "trace/trace-hw_dma.h"
        } else {
#line 32 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmalpiter " "loop reiteration" "\n");
#line 828 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmalpiter(void)
{
    if (true) {
        _nocheck__trace_pl330_dmalpiter();
    }
}

#define TRACE_PL330_DMALPFALLTHROUGH_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMALPFALLTHROUGH) || \
    false)

static inline void _nocheck__trace_pl330_dmalpfallthrough(void)
{
    if (trace_event_get_state(TRACE_PL330_DMALPFALLTHROUGH) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 33 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmalpfallthrough " "loop fallthrough" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 855 "trace/trace-hw_dma.h"
        } else {
#line 33 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmalpfallthrough " "loop fallthrough" "\n");
#line 859 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmalpfallthrough(void)
{
    if (true) {
        _nocheck__trace_pl330_dmalpfallthrough();
    }
}

#define TRACE_PL330_DMASEV_EVIRQ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMASEV_EVIRQ) || \
    false)

static inline void _nocheck__trace_pl330_dmasev_evirq(uint8_t ev_id)
{
    if (trace_event_get_state(TRACE_PL330_DMASEV_EVIRQ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 34 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmasev_evirq " "event interrupt raised %"PRId8 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , ev_id);
#line 886 "trace/trace-hw_dma.h"
        } else {
#line 34 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmasev_evirq " "event interrupt raised %"PRId8 "\n", ev_id);
#line 890 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmasev_evirq(uint8_t ev_id)
{
    if (true) {
        _nocheck__trace_pl330_dmasev_evirq(ev_id);
    }
}

#define TRACE_PL330_DMASEV_EVENT_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMASEV_EVENT) || \
    false)

static inline void _nocheck__trace_pl330_dmasev_event(uint8_t ev_id)
{
    if (trace_event_get_state(TRACE_PL330_DMASEV_EVENT) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 35 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmasev_event " "event raised %"PRId8 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , ev_id);
#line 917 "trace/trace-hw_dma.h"
        } else {
#line 35 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmasev_event " "event raised %"PRId8 "\n", ev_id);
#line 921 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmasev_event(uint8_t ev_id)
{
    if (true) {
        _nocheck__trace_pl330_dmasev_event(ev_id);
    }
}

#define TRACE_PL330_DMAST_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMAST) || \
    false)

static inline void _nocheck__trace_pl330_dmast(uint8_t chan, uint32_t addr, uint32_t sz, uint32_t num, char ch)
{
    if (trace_event_get_state(TRACE_PL330_DMAST) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 36 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmast " "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PRId32" %c" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , chan, addr, sz, num, ch);
#line 948 "trace/trace-hw_dma.h"
        } else {
#line 36 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmast " "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PRId32" %c" "\n", chan, addr, sz, num, ch);
#line 952 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmast(uint8_t chan, uint32_t addr, uint32_t sz, uint32_t num, char ch)
{
    if (true) {
        _nocheck__trace_pl330_dmast(chan, addr, sz, num, ch);
    }
}

#define TRACE_PL330_DMAWFE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DMAWFE) || \
    false)

static inline void _nocheck__trace_pl330_dmawfe(uint8_t ev_id)
{
    if (trace_event_get_state(TRACE_PL330_DMAWFE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 37 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_dmawfe " "event lowered 0x%"PRIx8 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , ev_id);
#line 979 "trace/trace-hw_dma.h"
        } else {
#line 37 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_dmawfe " "event lowered 0x%"PRIx8 "\n", ev_id);
#line 983 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_dmawfe(uint8_t ev_id)
{
    if (true) {
        _nocheck__trace_pl330_dmawfe(ev_id);
    }
}

#define TRACE_PL330_CHAN_EXEC_UNDEF_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_CHAN_EXEC_UNDEF) || \
    false)

static inline void _nocheck__trace_pl330_chan_exec_undef(void)
{
    if (trace_event_get_state(TRACE_PL330_CHAN_EXEC_UNDEF) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 38 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_chan_exec_undef " "undefined instruction" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 1010 "trace/trace-hw_dma.h"
        } else {
#line 38 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_chan_exec_undef " "undefined instruction" "\n");
#line 1014 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_chan_exec_undef(void)
{
    if (true) {
        _nocheck__trace_pl330_chan_exec_undef();
    }
}

#define TRACE_PL330_EXEC_CYCLE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_EXEC_CYCLE) || \
    false)

static inline void _nocheck__trace_pl330_exec_cycle(uint32_t addr, uint32_t size)
{
    if (trace_event_get_state(TRACE_PL330_EXEC_CYCLE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 39 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_exec_cycle " "PL330 read from memory @0x%08"PRIx32" (size = 0x%08"PRIx32")" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, size);
#line 1041 "trace/trace-hw_dma.h"
        } else {
#line 39 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_exec_cycle " "PL330 read from memory @0x%08"PRIx32" (size = 0x%08"PRIx32")" "\n", addr, size);
#line 1045 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_exec_cycle(uint32_t addr, uint32_t size)
{
    if (true) {
        _nocheck__trace_pl330_exec_cycle(addr, size);
    }
}

#define TRACE_PL330_HEXDUMP_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_HEXDUMP) || \
    false)

static inline void _nocheck__trace_pl330_hexdump(uint32_t offset, char * str)
{
    if (trace_event_get_state(TRACE_PL330_HEXDUMP) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 40 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_hexdump " " 0x%04"PRIx32":%s" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , offset, str);
#line 1072 "trace/trace-hw_dma.h"
        } else {
#line 40 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_hexdump " " 0x%04"PRIx32":%s" "\n", offset, str);
#line 1076 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_hexdump(uint32_t offset, char * str)
{
    if (true) {
        _nocheck__trace_pl330_hexdump(offset, str);
    }
}

#define TRACE_PL330_EXEC_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_EXEC) || \
    false)

static inline void _nocheck__trace_pl330_exec(void)
{
    if (trace_event_get_state(TRACE_PL330_EXEC) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 41 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_exec " "pl330_exec" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 1103 "trace/trace-hw_dma.h"
        } else {
#line 41 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_exec " "pl330_exec" "\n");
#line 1107 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_exec(void)
{
    if (true) {
        _nocheck__trace_pl330_exec();
    }
}

#define TRACE_PL330_DEBUG_EXEC_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DEBUG_EXEC) || \
    false)

static inline void _nocheck__trace_pl330_debug_exec(uint8_t ch)
{
    if (trace_event_get_state(TRACE_PL330_DEBUG_EXEC) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 42 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_debug_exec " "chan id: 0x%"PRIx8 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , ch);
#line 1134 "trace/trace-hw_dma.h"
        } else {
#line 42 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_debug_exec " "chan id: 0x%"PRIx8 "\n", ch);
#line 1138 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_debug_exec(uint8_t ch)
{
    if (true) {
        _nocheck__trace_pl330_debug_exec(ch);
    }
}

#define TRACE_PL330_DEBUG_EXEC_STALL_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_DEBUG_EXEC_STALL) || \
    false)

static inline void _nocheck__trace_pl330_debug_exec_stall(void)
{
    if (trace_event_get_state(TRACE_PL330_DEBUG_EXEC_STALL) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 43 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_debug_exec_stall " "stall of debug instruction not implemented" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     );
#line 1165 "trace/trace-hw_dma.h"
        } else {
#line 43 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_debug_exec_stall " "stall of debug instruction not implemented" "\n");
#line 1169 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_debug_exec_stall(void)
{
    if (true) {
        _nocheck__trace_pl330_debug_exec_stall();
    }
}

#define TRACE_PL330_IOMEM_WRITE_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_IOMEM_WRITE) || \
    false)

static inline void _nocheck__trace_pl330_iomem_write(uint32_t offset, uint32_t value)
{
    if (trace_event_get_state(TRACE_PL330_IOMEM_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 44 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_iomem_write " "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , offset, value);
#line 1196 "trace/trace-hw_dma.h"
        } else {
#line 44 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_iomem_write " "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 "\n", offset, value);
#line 1200 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_iomem_write(uint32_t offset, uint32_t value)
{
    if (true) {
        _nocheck__trace_pl330_iomem_write(offset, value);
    }
}

#define TRACE_PL330_IOMEM_WRITE_CLR_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_IOMEM_WRITE_CLR) || \
    false)

static inline void _nocheck__trace_pl330_iomem_write_clr(int i)
{
    if (trace_event_get_state(TRACE_PL330_IOMEM_WRITE_CLR) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 45 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_iomem_write_clr " "event interrupt lowered %d" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , i);
#line 1227 "trace/trace-hw_dma.h"
        } else {
#line 45 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_iomem_write_clr " "event interrupt lowered %d" "\n", i);
#line 1231 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_iomem_write_clr(int i)
{
    if (true) {
        _nocheck__trace_pl330_iomem_write_clr(i);
    }
}

#define TRACE_PL330_IOMEM_READ_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_PL330_IOMEM_READ) || \
    false)

static inline void _nocheck__trace_pl330_iomem_read(uint32_t addr, uint32_t data)
{
    if (trace_event_get_state(TRACE_PL330_IOMEM_READ) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 46 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:pl330_iomem_read " "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , addr, data);
#line 1258 "trace/trace-hw_dma.h"
        } else {
#line 46 "../xemu/hw/dma/trace-events"
            qemu_log("pl330_iomem_read " "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 "\n", addr, data);
#line 1262 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_pl330_iomem_read(uint32_t addr, uint32_t data)
{
    if (true) {
        _nocheck__trace_pl330_iomem_read(addr, data);
    }
}

#define TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL_BACKEND_DSTATE() ( \
    trace_event_get_state_dynamic_by_id(TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL) || \
    false)

static inline void _nocheck__trace_xilinx_axidma_loading_desc_fail(uint32_t res)
{
    if (trace_event_get_state(TRACE_XILINX_AXIDMA_LOADING_DESC_FAIL) && qemu_loglevel_mask(LOG_TRACE)) {
        if (message_with_timestamp) {
            struct timeval _now;
            gettimeofday(&_now, NULL);
#line 49 "../xemu/hw/dma/trace-events"
            qemu_log("%d@%zu.%06zu:xilinx_axidma_loading_desc_fail " "error:%u" "\n",
                     qemu_get_thread_id(),
                     (size_t)_now.tv_sec, (size_t)_now.tv_usec
                     , res);
#line 1289 "trace/trace-hw_dma.h"
        } else {
#line 49 "../xemu/hw/dma/trace-events"
            qemu_log("xilinx_axidma_loading_desc_fail " "error:%u" "\n", res);
#line 1293 "trace/trace-hw_dma.h"
        }
    }
}

static inline void trace_xilinx_axidma_loading_desc_fail(uint32_t res)
{
    if (true) {
        _nocheck__trace_xilinx_axidma_loading_desc_fail(res);
    }
}
#endif /* TRACE_HW_DMA_GENERATED_TRACERS_H */
